Quantum Control: From Code to Microwaves

The Interaction Hamiltonian

To execute a CNOT, we drive the Control qubit with a microwave tone exactly matching the frequency of the Target qubit (\( f_T \)). Because they are capacitively coupled, this off-resonant drive on the Control qubit bleeds over and drives the Target qubit.

Under the Rotating-Wave Approximation (RWA), the fast oscillating terms average out to zero, leaving behind an effective interaction Hamiltonian dominated by the \( ZX \) term:

This means the Target qubit undergoes an X-rotation (flips) at a speed that depends entirely on whether the Control qubit is in the \( |0\rangle \) or \( |1\rangle \) (\( \hat{Z} \)) state. By carefully calibrating the duration of the pulse, we achieve perfect entanglement.

The DRAG Mathematical Formulation

Instead of driving the qubit solely with an in-phase pulse \( \Omega_x(t) \) (typically a Gaussian), we introduce a quadrature control tone \( \Omega_y(t) \) that is phase-shifted by 90 degrees. The complex drive envelope is written as:

DRAG actively cancels the leakage by setting the quadrature drive \( \Omega_y(t) \) to be proportional to the time-derivative of the primary in-phase pulse:

This yields the complete DRAG pulse formulation:

Physical Derivation & Intuition: To understand why the derivative cancels the leakage, we perform a unitary frame transformation (a time-dependent rotation) that "tilts" the quantization axis of the driven transmon. Under this rotating frame, the Hamiltonian's coupling between the computational subspace and the state \( |2\rangle \) is suppressed. The derivative quadrature tone acts as a dynamic Stark shift: it continuously detunes the transmon's transition frequencies during the pulse's rise and fall, causing the virtual transitions along the leakage pathway to destructively interfere with themselves, yielding zero net population in \( |2\rangle \) at the end of the gate.

Gradient Ascent Pulse Engineering (GRAPE)

To safely navigate a highly crowded energy landscape governed by the system Hamiltonian \( \hat{H}_0 + \sum_k u_k(t) \hat{H}_k \), we abandon standard analytical pulses and use GRAPE. The microwave envelope \( u_k(t) \) is mathematically sliced into hundreds of discrete 1-nanosecond "pixels."

• A classical supercomputer simulates the unitary evolution operator \( \hat{U}(t) \) based on the current pulse shape.
• It calculates the gradient of the target fidelity \( \Phi \) with respect to the amplitude of every single 1ns pixel.
• It iteratively updates the pixels using gradient ascent to find a highly irregular analog waveform that perfectly steers the quantum state while actively canceling out leakage to non-computational states (e.g., \( |2\rangle, |3\rangle \)) via destructive interference.

Direct Digital Synthesis (DDS)

We rely on room-temperature Radio Frequency System-on-Chips (RFSoCs), massive FPGA processors (like Xilinx Zynq Ultrascale+) combined with bleeding-edge Digital-to-Analog Converters (DACs).

The optimal control wave arrays are loaded into the FPGA's memory. During execution, the FPGA streams this digital data into the DACs at a staggering rate of 8 to 10 Giga-Samples Per Second (GSPS). This allows the RFSoC to synthesize 5.0 GHz microwaves directly in the first Nyquist zone, without relying on unstable analog IQ mixers.

The Memory Bottleneck

Shor's algorithm requires millions of sequential gates. Storing billions of 16-bit voltage samples in FPGA RAM is physically impossible. Modern controllers must therefore use Parametric Compilation: the FPGA stores a small dictionary of base GRAPE pulse shapes, and a real-time sequencer stretches, scales, and alters their phase on-the-fly according to the quantum assembly code.

Active Qubit Reset

In active reset, we measure the qubit immediately and apply a conditional \( \pi \)-pulse to force it back to \( |0\rangle \) if it is found in \( |1\rangle \). This reduces the reset time from ~500 µs to under 500 ns—a factor of 1000× improvement.

The total feedback loop latency budget breaks down as:

This tight loop demands deterministic, hard-real-time processing on the FPGA. Any jitter or non-determinism in the decision pipeline directly degrades reset fidelity.

Why Active Reset Matters for QEC

In topological QEC schemes, syndrome extraction requires measuring ancilla (measure) qubits every cycle and resetting them immediately for the next round. If passive reset is used, each QEC cycle takes at least \( 5 \times T_1 \approx 500\,\mu\text{s} \), limiting the code to ~2,000 cycles per second. Active reset shrinks this to \( \lesssim 500\,\text{ns} \), enabling QEC cycle rates above \( 10^5 \) per second—fast enough to keep pace with decoherence.

Qudit Active Reset Challenge

For qudit systems with \( d > 2 \), active reset becomes significantly harder. The readout must discriminate between \( d \) states (not just 2), the FPGA must decide which correction to apply, and the controller must issue up to \( d-1 \) sequential \( \pi \)-pulses to cascade the population back from \( |d{-}1\rangle \) down to \( |0\rangle \). Each additional level increases the total reset latency and demands higher readout signal-to-noise for reliable state discrimination.

Randomized Benchmarking (RB)

How do we know the control pulses are actually good? Randomized benchmarking is the gold-standard protocol for characterizing average gate error, independent of state preparation and measurement (SPAM) errors.

A sequence of \( m \) random Clifford gates is applied, followed by an inversion gate. The survival probability decays exponentially with sequence length:

where \( p \) is the depolarizing parameter. The average error per gate (EPC) is extracted as:

where \( d = 2^n \) is the Hilbert-space dimension. For single-qubit gates (\( d=2 \)), this simplifies to \( r = (1 - p)/2 \). State-of-the-art transmon gates achieve \( r < 10^{-4} \), meaning fewer than 1 error per 10,000 gates.